Showing posts with label electronic. Show all posts
Showing posts with label electronic. Show all posts

Thursday, November 6, 2014

Intelligent Electronic Lock

This intelligent electronic lock circuit is built using transistors only. To open this electronic lock, one has to press tactile switches S1 through S4 sequentially. For deception you may annotate these switches with different numbers on the control panel/keypad. For example, if you want to use ten switches on the keypad marked ‘0’ through ‘9’, use any four arbitrary numbers out of these for switches S1 through S4, and the remaining six numbers may be annotated on the leftover six switches, which may be wired in parallel to disable switch S6 (shown in the figure). 

When four password digits in ‘0’ through ‘9’ are mixed with the remaining six digits connected across disable switch terminals, energisation of relay RL1 by unauthorized person is prevented.For authorized persons, a 4-digit password number is easy to remember. To energies relay RL1, one has to press switches S1 through S4 sequentially within six seconds, making sure that each of the switch is kept depressed for a duration of 0.75 second to 1.25 seconds. The relay will not operate if ‘on’ time duration of each tactile switch (S1 through S4) is less than 0.75 second or more than 1.25 seconds.

This would amount to rejection of the code. A special feature of this circuit is that pressing of any switch wired across disable switch (S6) will lead to disabling of the whole electronic lock circuit for about one minute. Even if one enters the correct 4-digit password number within one minute after a ‘disable’ operation, relay RL1 won’t get energized. So if any unauthorized person keeps trying different permutations of numbers in quick successions for energisation of relay RL1, he is not likely to succeed. To that extent, this electronic lock circuit is fool-proof. This electronic lock circuit comprises disabling, sequential switching, and relay latch-up sections. The disabling section comprises zener diode ZD5 and transistors T1 and T2. Its function is to cut off positive supply to sequential switching and relay latch-up sections for one minute when disable switch S6 (or any other switch shunted across its terminal) is momentarily pressed.

Intelligent Electronic Lock Circuit Diagram:
Intelligent



During idle state, capacitor C1 is in discharged condition and the voltage across it is less than 4.7 volts. Thus zener diode ZD5 and transistor T1 are in non-conduction state. As a result, the collector voltage of transistor T1 is sufficiently high to forward bias transistor T2. Consequently, +12V is extended to sequential switching and relay latch-up sections. When disable switch is momentarily depressed, capacitor C1 charges up through resistor R1 and the voltage available across C1 becomes greater than 4.7 volts. Thus zener diode ZD5 and transistor T1 start conducting and the collector voltage of transistor T1 is pulled low. As a result, transistor T2 stops conducting and thus cuts off positive supply voltage to sequential switching and relay latch-up sections. Thereafter, capacitor C1 starts discharging slowly through zener diode D1 and transistor T1. It takes approximately one minute to discharge to a sufficiently low level to cut-off transistor T1, and switch on transistor T2, for resuming supply to sequential switching and relay latch-up sections; and until then the circuit does not accept any code.

The sequential switching section comprises transistors T3 through T5, zener diodes ZD1 through ZD3, tactile switches S1 through S4, and timing capacitors C2 through C4. In this three-stage electronic switch, the three transistors are connected in series to extend positive voltage available at the emitter of transistor T2 to the relay latch-up circuit for energising relay RL1.  When tactile switches S1 through S3 are activated, timing capacitors C2, C3, and C4 are charged through resistors R3, R5, and R7, respectively. Timing capacitor C2 is discharged through resistor R4, zener diode ZD1, and transistor T3; timing capacitor C3 through resistor R6, zener diode ZD2, and transistor T4; and timing capacitor C4 through zener diode ZD3 and transistor T5 only. The individual timing capacitors are chosen in such a way that the time taken to discharge capacitor C2 below 4.7 volts is 6 seconds, 3 seconds for C3, and 1.5 seconds for C4. Thus while activating tactile switches S1 through S3 sequentially, transistor T3 will be in conduction for 6 seconds, transistor T4 for 3 seconds, and transistor T5 for 1.5 seconds.

The positive voltage from the emitter of transistor T2 is extended to tactile switch S4 only for 1.5 seconds. Thus one has to activate S4 tactile switch within 1.5 seconds to energise relay RL1. The minimum time required to keep switch S4 depressed is around 1 second. For sequential switching transistors T3 through T5, the minimum time for which the corresponding switches (S1 through S3) are to be kept depressed is 0.75 seconds to 1.25 seconds. If one operates these switches for less than 0.75 seconds, timing capacitors C2 through C4 may not get charged sufficiently. As a consequence, these capacitors will discharge earlier and any one of transistors T3 through T5 may fail to conduct before activating tactile switch S4.  Thus sequential switching of the three transistors will not be achieved and hence it will not be possible to energise relay RL1 in such a situation. A similar situation arises if one keeps each of the mentioned tactile switches de-pressed for more than 1.5 seconds.

When the total time taken to activate switches S1 through S4 is greater than six seconds, transistor T3 stops conducting due to time lapse. Sequential switching is thus not achieved and it is not possible to energise relay RL1. The latch-up relay circuit is built around transistors T6 through T8, zener diode ZD4, and capacitor C5. In idle state, with relay RL1 in de-energised condition, capacitor C5 is in discharged condition and zener diode ZD4 and transistors T7, T8, and T6 in non-conduction state. However, on correct operation of sequential switches S1 through S4, capacitor C5 is charged through resistor R9 and the voltage across it rises above 4.7 volts. Now zener diode ZD4 as well as transistors T7, T8, and T6 start conducting and relay RL1 is energised. Due to conduction of transistor T6, capacitor C5 remains in charged condition and the relay is in continuously energised condition. Now if you activate reset switch S5 momentarily, capacitor C5 is immediately discharged through resistor R8 and the voltage across it falls below 4.7 volts. Thus zener diode ZD4 and transistors T7, T8, and T6 stop conducting again and relay RL1 de-energises.



Sunday, November 2, 2014

HANDY 0 12V DC POWER SUPPLY ELECTRONIC DIAGRAM


HANDY 0-12V DC POWER SUPPLY ELECTRONIC DIAGRAM

For heat protection, heat sink is needed for the BD679 transistor. It is because it will be over tempered when works more than 200mA.

FEATURES:
0v to 12 volt output:
- 700mA with M 2155
- 1.4amp with M 2156
- 1A with 16v AC 1.5 amp plug pack

30W GUITAR AMPLIFIER ELECTRONIC DIAGRAM


30W GUITAR AMPLIFIER ELECTRONIC DIAGRAM

This is design of 30W Guitar Amplifier ELECTRONIC DIAGRAM

RESISTOR TO REDUCE L200 POWER DISSIPATION ELECTRONIC DIAGRAM

RESISTOR TO REDUCE L200 POWER DISSIPATION ELECTRONIC DIAGRAM

Instead of in series with the input, the resistor R can be connected between pins 1 and 2 of the IC if the load is constant. You can see this in the right figure. This will make some part of the load current flows through the resistor and the other part through the device.

9V HEADPHONE AMPLIFIER NE5534 ELECTRONIC DIAGRAM

9V HEADPHONE AMPLIFIER NE5534 ELECTRONIC DIAGRAM

I have Used it with Sennheiser 465s and achieved ear-splitting volume. The amplifier is ideal as a booster for power-conserving stereo sources Such as portable CD players and for interfacing with passive EQ networks Such as tone controls or a headphone acoustic simulator.

10W AUDIO AMPLIFIER WITH BASS BOOST ELECTRONIC DIAGRAM

10W AUDIO AMPLIFIER WITH BASS-BOOST ELECTRONIC DIAGRAM

Adjust the volume control on the minimum and R3 position with a minimum value of resistance as well. try to switch the circuit set in R3 to read the flow of about 20 to 25mA. Wait for 15 minutes, connect the ground of A1, P1, C2, C3dan C4. Connect the output also C9 ground

List Component

  • P1 : 22K Log Potemsiometer (Dual gang for stereo)
  • C3, 4 : 470uF/25V
  • P2 : 100K Log Potemsiometer (Dual gang for stereo)
  • C6 : 47pF 63V ceramic ar polyester capasitor
  • R2, 4, 8 : 820R 1/4W
  • C7 : 10nF 63V polyester capasitor
  • R1 : 4K7 1/4W
  • C9 : 100nF 63V polyester capasitor
  • R3 : 500R 1/2W
  • D1 : 1N4148 75V 150mA Diode
  • R5 : 82K 1/4W
  • IC 1 : NE5532 Low noise Dual Op-amp
  • R6, 7 : 47K 1/4W
  • Q1 : BC547B 45V 100mA NPN Transitor
  • R9 : 10R 1/2W
  • Q2 : BC557B 45V 100mA PNP Transitor
  • R10 : 0,22 4W(wirewound)
  • Q3 : TIP42A 60V 6A PNP Transistor
  • C1, 8 : 470nF 63V polyester capasitor
  • Q4 : TIP41A 60V 6A NPN Transistor
  • C2, 5 : 100uF/25V J1 : RCA audio input socket

Tuesday, October 28, 2014

NCP2824 bassed Class D amplifier electronic project Diagram Circuit

Using the NCP2824 filterless Class D amplifier can be designed a very simple low power audio amplifier electronic project, capable of delivering up to 2.4 W to a 4 ohms load with a 5 V supply voltage.
With the same battery voltage, it can deliver 1.2 W to an 8 ohms load with less than 1% THD+N. The non−clipping function automatically adjusts the output voltage in order to control the distortion when an excessive input is applied to the amplifier.

This adjustment is done thanks to an Automatic Gain Control circuitry (AGC) built into the chip. A simple single wire interface allows to the non Clipping function to be enabled and disabled.
A programmable power limit function is also embedded in order to protect speakers from damage caused by an excessive sound level.
2.4

Wednesday, October 15, 2014

Simple Analogue Electronic Key

This circuit uses two comparator that are combined in what is called a window comparator, i.e. resistors R2, R5, and R10 determine a voltage window within which the voltage applied to the junction of D2 and D6 must lie in order for the outputs of IC2.A and IC2.B to both be high at the same time. Given the value used for these resistors, this window is from 10/21 to 11/21 of the comparator supply rail (5 V). If IC2.A and IC2.B outputs are both high at the same time, transistor T1 is saturated via the AND gate formed by D3 and D4, and relay RE1 is energized to operate the electric latch or any other locking device.

Analogue Electronic Key Circuit Diagram


The key is defined by the generation of the specif ic voltage at the junction of D2 and D6, formed, for example, by a simple stereo jack containing the two resistors R4 and R8. Together with R1 and R9, they form a potential divider that needs to be suitably calculated in conjunction with the values of R2, R5, and R10 so that the key can open the lock. Clearly, all this will only work correctly is the supply voltage to these two dividers is stable, which is ensured by IC1, regulating it to 5 V.If we had set the values for R1 and R9, all the readers of this edition of Elektor would have had the same key, which is clearly not a good idea! So you need to decide for yourself not only R4 and R8, which form the key, but also R1 and R9 which let you customize the ‘lock’.1 Here are the relationships between the values of resistors R1, R4, R8, and R9 for the key to be able to open the lock:

10 · R8 · R9 <11 · (r1 + r4) · (r8 + r9) 10 · (r1 + r4) · (r8 + r9) <11 · r8 · r9

 Given the size of the window for me d by R2, R5, and R10, 5 % tolerance resistors are adequate.

Note too that, as the relationships consist of inequalities, and that there are only two (un)equations for four unknowns, this leaves quite a wide choice for the resistor values. We advise you to set at least two of them to preferred values, which will then let you work out the others. If, as is more than likely, this does not result in other preferred values, you’ll then need to use series/parallel combinations to obtain the calculated values or else choose different starting values in order to arrive at a better compromise.

Wednesday, October 1, 2014

Electronic DPDT Switch

Switch It should be appreciated that the output impedance of the switch is fairly high and so for low signal distortion, a load greater than 10kS2 is necessary.
Using a high supply voltage (1 0-1 5V) also helps to achieve this end. The gates will pass signals above the 10MHz mark but as the frequency becomes higher, crosstalk between the switchesand distortion will inevitably increase.


A simple electronic DPDT switch circuit through a single trigger input




Thursday, September 18, 2014

Electronic Fuse for DC Short Circuit Protection

This is an electronic fuse that protects the load against short schema.

Project Description

Relays must be chosen with a voltage value equals to the input voltage. Don’t omit using the 100uF capacitor with appropriate voltage value with respect to the input voltage. If you can’t provide, you can use C106 instead of BRX46.

Circuit


You can adjust the current with using 10K potentiometer. If you will use the fuse with very high currents, lower the 0R6 5W resistor value (ex. 0R47, 0R33, 0R22 or 0R1). Watt value of the resistor should be increased also.